(i) Technical Field
The present disclosure relates to semiconductor memory device and method of manufacturing the same, and more particularly, to a semiconductor memory device including a gate electrode having a more reduced sheet resistance and a resistor pattern having a uniform resistance and a method of manufacturing the same.
(ii) Description of the Related Art
Semiconductor memory devices may include word lines and resistors. As the integration of semiconductor memory devices increases, a line width of a word line may become finer. As a word line becomes finer, a sheet resistance of a conductive pattern may increase. Also, when a word line is formed of polysilicon, as a word line becomes finer, an RC time delay may increase during an operation of a memory device due to a high resistance of polysilicon and thereby performance of a semiconductor memory device may be deteriorated. Thus, a word line may include a silicide layer so as to reduce a sheet resistance together with miniaturization of a word line.
When a resistor pattern and a word line are formed at the same time, a silicide layer may also be formed on a top surface of the resistor pattern and the silicide layer which may in turn reduce a resistance of the resistor pattern. Thus, an area of a resistor pattern may increase so that a resistor pattern on a top surface of which a silicide layer is formed has a predetermined resistance. However, an increase of area of a resistor pattern may be an obstacle to a high integration of a semiconductor device.